On the Impact of MOS transistor’s Gate Resistance on CMOS Oscillators beyond 10 GHz operation:

Analysis and Design Strategy

 

 

Ittipon Kunnapatee

The Electrical Engineering Graduate Program, Faculty of Engineering,

 Mahanakorn University of Technology.

 

Apisak Worapishet

Mahanakorn Microelectronics Research Center (MMRC)

Mahanakorn University of Technology, Nongchok, Bangkok 10530, Thailand

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Manuscript received August 29, 2011

Revised September 19, 2011

 

 


ABSTRACT

 

The impact of MOS transistors’ gate resistance on the phase noise performance of CMOS LC oscillators is investigated. As oscillation frequencies approaches 10 GHz and beyond, the loss due to the gate resistance starts to dominate the total Q factor of the oscillators’ LC resonators, degrading the phase noise. A detailed analysis of the Q factor including the gate resistance is given, and this leads to a design strategy to mitigate the impact via the concept of minimum inductance. Simulations of oscillators for the oscillation frequencies ranging from 2 GHz to 32 GHz are provided to verify the impact, and to demonstrate the integrity of the analysis and design strategy.

 

 

 

Keywords: LC resonator, oscillator, phase noise, Q factor.

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